The short channel effects can be reduced using two techniques—the gate engineering technique and the channel engineering technique. The gate material engineering technique allows the Double Material Gate (DMG) devices to have same threshold voltage for a reduced doping concentration in the channel region, which gives better immunity to mobility degradation. In DMG MOSFET, two different materials of different work functions are combined to form a single gate of a bulk MOSFET, and in the channel engineering technique, a single halo or double haloes are used, which shows a considerable reduction of Strongly Correlated Electron Systems (SCEs) and hot electron effects. It is seen that a single gate double material double halo MOSFET provides excellent short channel suppression as compared to single halo or double halo MOSFET for channel lengths around 40 nm. In this paper, a surface potential model for Double Gate Double Metal Double Halo (DGDMDH) MOSFET in the subthreshold regime is proposed. The basic idea is to model the subthreshold surface potential applying Gauss’s law to a rectangular box covering the depletion layer depth. This structure provides excellent immunity to short channel effects as compared to conventional devices and hence can be used in low power VLSI circuits.

Double Gate Double Metal Double Halo (DGDMDH)-MOS transistor (Figure 1) uses two laterally contacted materials of different work functions as the gate. The structure of the n-channel DGDMDH-MOS transistor used two different materials M1 and M2 with lengths L1 and L2, and with work functions F1 and F2, respectively, contacted laterally are used as the gate. The overall effective channel length L = L1 + L2 is defined as the distance from the source-channel metallurgical junction to the drain-channel metallurgical junction (Baishya et al., 2006a and 2006b). The work function of the metal gate 1 (M1) is greater than that of metal gate 2 (M2), that is, F1 > F2. So, the electric field and electron velocity along the channel suddenly increase near the interface of the two gate materials. For this reason, threshold voltage under gate material M1 is higher than that under gate material M2. When the applied drain voltage exceeds the drain saturation voltage, the excess voltage is absorbed by gate metal M2, preventing the drain field from penetrating into the channel (Swapnadip et al., 2011). Also, this gives rise to a step change of the surface potential profile at the point where M1 and M2 are contacted; in other words, a higher flat-band voltage corresponding to the gate material 1 than that of gate material 2. This step potential is thus responsible for lower subthreshold leakage current, reduced Drain Induced Barrier Lowering (DIBL) effects, which in turn, lowers the surface potential near the source, and hence the increased barrier between the source and the channel is resulted that reduces the DIBL effect mean short channel effect also. It is a double halo where the source and drain end of the channel are heavily doped with p+ doping atoms to minimize the depletion width and the SCEs. Thus, the device is immune to the hot carrier effect. In the double gate, gate voltages at the front and back gate can tune the threshold voltage by the metal gate work function and provide a better scalability option due to its excellent immunity to Strongly Correlated Electron Systems (SCEs).

Electrical and Electronics Engineering Journal, Artificial Neural Network (ANN), Dielectric Resonator Antenna (DRA)