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The IUP Journal of Electrical and Electronics Engineering

Design and Performance Analysis of Mux Using ECRL, MERL and PFAL

Article Details

Pub. Date	: April, 2019
Product Name	: The IUP Journal of Electrical and Electronics Engineering
Product Type	: Article
Product Code	: IJEEE31904
Author Name	: Raman and Ramnish Kumar
Availability	: YES
Subject/Domain	: Management
Download Format	: PDF Format
No. of Pages	: 17

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Abstract

The paper compares three adiabatic logic designs like Efficient Charge Recovery Logic (ECRL), Modified Energy Recovery Logic (MERL) and Positive Feedback Adiabatic Logic (PFAL). A 2:1 multiplexer is implemented using these design techniques and the results are compared in terms of rise time, fall time, transistor count, delay, slew rate, etc. The designed circuits are simulated using mentor graphics VLSI design software Pyxis _v10.5_5_201606075. From the results, it is found that the delay of PFAL-based circuits is better compared to ECRL and MERL.

Description

Minimization of power dissipation and consumption is a primary concern in VLSI design. Due to the vast development in VLSI technology in the field of embedded systems, mobile technology computing system, etc., the demand for low power consumption with faster speed has increased. It is becoming harder and harder to remove the heat produced by high-performance chips (Denker, 1994). Low energy computing is an idea whose time has come for applications include the smallest systems (where battery size and weight are crucial) and the largest systems (where power supply and cooling are crucial) (Krame et al., 1994). There has been a growing interest in low power logic circuitry, both to increase battery life in portable equipment and to reduce the cooling requirements of complex integrated circuits. Recovered Energy Logic (REL) and other the so-called adiabatic logic topologies minimize dissipation by keeping the voltage across conducting devices small at all times (Hinman and Schlecht, 1994). If circuits can be made to operate in an adiabatic regime with consequently low energy dissipation, then the energy used to charge the capacitive signal nodes in a circuit may be recovered during discharge and stored for reuse. The efficiency of such circuit is then limited only by the “adiabaticity” of the energy transfers (Dickinson and Denker, 1995). Adiabatic computing, which uses an AC power supply rather than DC, is an attractive approach in this viewpoint. Most of the proposed adiabatic circuits use diodes or diode-like devices for precharge. This causes unavoidable energy loss due to the voltage drop across the diodes. However, energy dissipation as a whole is still smaller than that of static logic.