Fast packet switches route the packets towards their respective destinations at a
high speed of a few Gigabits per second. They provide low bit error rates, and are
well supported for use on high-speed fiber links. They find their application in
Broadband Integrated Services Digital Networks (B-ISDN) and Asynchronous Transfer
Mode/ Internet Protocol Integrated Networks (A/I Net) (Lea et al.,1999; Schmitt et al., 2000; and
Tsui et al., 2000). An ATM/IP fast packet switch is shown in Figure 1.
The core of a fast packet switch which influences both the performance and
the cost is its switching fabric (Onvural, 1995). Banyan network is a popular choice
due to its suitability to Very-Large-Scale Integration
(VLSI) implementation and its self-routing capability (Cheneemalavagu and Malek, 1982). The switching fabrics based on
banyan networks are self-routing, simple and modular, but they are blocking type
switches.
To treat the problem of blocking, deflection routing is used in high-speed
networks since it gives a good performance and is easy to implement. Deflection routing
in delta networks was proposed by Park et
al. (1995) for implementation of a cyclic banyan network. It requires complex routing decisions at switching element
level, which increases delay. To resolve the issue, a reconfigurable switching fabric
was introduced in (Laskaridis et al., 2002). It used traffic history for quick switching,
a highly complex design. |