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The IUP Journal of Science & Technology :
Area Efficient FPGA Implementation of AES-128
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The National Institute of Standard and Technology (NIST) approved Rijndael algorithm as a standard for Advanced Encryption Standard (AES) in October 2000. AES is nowadays used extensively in many network and multimedia applications to protect electronic data for security issues. In this paper, two architectures are proposed: one of which reduces the required hardware requirement, while the second achieves high-speed performance. The first architecture uses a feedback structure for key generation. The second architecture uses a memory for key storage and has a structure of RCON and key expansion unit that is different from LUT structure. Using VirtexE, two different key expansion units of both architectures have been designed and implemented on xcv300e-7bg432 FPGA. For the first, memory usage is 88388 K bytes, minimum delay is 11.02 ns (x10) and throughput is 11.17 M bit/sec, while for the second architecture, the memory usage, minimum delay and throughput are 99844 K bytes, 9.322 ns and 1.248 G bit/sec respectively.

Transmission and storage of important data are rapidly growing in network environments. Along with it grows the need for efficient and fast data encryption. Cryptography consists of some mathematical techniques so as to secure data transmission. In earlier times intelligence agents, military leaders, and some diplomats used encryption for the purpose of secrecy in important communications, but now these are also used for public commercial use. Software implementations of cryptographic algorithms cannot provide the necessary performance when large amounts of data have to be moved with a very high speed that can reach the Gbps range. Therefore, hardware implementations have to be considered for these applications, either in ASIC or FPGA forms.

Data Encryption Standard (DES) was the first attempt to produce high quality government sanctioned encryption algorithm; then came Triple DES; and finally National Institute of Standard and Technology (NIST) announced the AES, developed by Joan Daemen and Vincent Rijmen in order to replace the aging DES. AES standards have defined some mathematical steps that are to be followed as an algorithm. Data in its original form is given as input known as plaintext, and after performing encryption steps, the result is cipher text. The cipher text has all the information of plaintext, but is not in human or computer readable form and the information can be recovered only after proper decryption. The encrypting procedure is varied depending on the key, which changes the detailed operation of the algorithm. Key is essential for encrypting and decrypting a cipher. The application of AES algorithm can be found in smart cards, mobile phones, WWW servers, Automated Teller Machines (ATMs) and digital video recorders [1, 2, 8, 9].

 
 
 

FPGA Implementation of AES-128, National Institute of Standard and Technology, NIST, Advanced Encryption Standard, AES, multimedia applications, network environments, mathematical techniques, cryptographic algorithms, Data Encryption Standard, DES, Automated Teller Machines, ATMs, WWW servers.