The IUP Journal of Electrical and Electronics Engineering
4-Bit Ripple Carry Adder Using Area-Efficient Full Adder in CMOS Technology

Article Details
Pub. Date : Jan, 2021
Product Name : The IUP Journal of Electrical and Electronics Engineering
Product Type : Article
Product Code : IJEEE30121
Author Name : Gyanender Kumar, Lincoln Hadda
Availability : YES
Subject/Domain : Engineering
Download Format : PDF Format
No. of Pages : 12

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Abstract

Basic functions of arithmetic operation are addition done by Full Adder (FA) which plays a significant role in different areas, including Very Large-Scale Integrated Circuits (VLSI), Microprocessors (MP) and Digital Signal Processing (DSP). Hence, the proposed designs of 32T and 112T are a viable option for low power complex system design. The power consumption and speed for 28T 1-bit adder are 9.9 mW and 35 ps, respectively. The power consumption and speed for 8T 1-bit adder are 4.8 mW and 20 ps, respectively. The speeds for 112T 4-bit adder and 32T 4-bit adder are 160 ps and 89 ps, respectively.


Description

Due to the sudden revolution in technology, demand for VLSI design has increased due to their fast processing, compact circuitry and low power consumption. We need to have cutting-edge technology which is going to be the next big thing in market. Devices should be more compact. Osborne 1, released in 1981, used Zilog Z80 and weighed 23.6 pounds (10.7 kg). It had no battery, a 5 in (13 cm) CRT screen, and dual 5.25 in (13.3 cm) single-density floppy drives. Gradually, the bulky laptop was replaced by compact or portable laptop. Now, laptops are getting more lightweighted, and the 2-pound laptop is the lightest of all and more portable than any other laptop available. With portability and lightweight, power consumption is also an important factor to be considered (Arkadiy et al., 2002; and Abiri et al., 2014).


Keywords

Full Adder (FA), Power dissipation