The design and simulation of a novel CMOS voltage mode Winner-Take-All (WTA) circuit are described in this paper. The circuit employs additional inhibitory and local excitatory feedback based on a common voltage computation, and this improves both the speed and precision drastically. As a result, a single stage cell provides better resolution and speed in comparison to previous works like Choi and Sheu (1993), where cascading was necessary to improve resolution, and Donckers et al. (1999). However, in an earlier work, Rahaman et al. (2009) observed that the resolution was 0.5 mV and the circuit was functioning for only two cells, and it also had a low dynamic range. Whereas the circuit described in this paper is tested with five contending cells and it shows better dynamic range as well as resolution. The simulations in Cadence show that a single cell can resolve voltage differences as small as 0.1 mV in about 60-80 ns, in comparison to the resolution of 100 mV in Choi and Sheu (1993) and 0.5 mV in Rahaman et al. (2009). Detailed simulation results along with appropriate mathematical relations have been presented. This circuit is a fundamental building block in the competitive layer of self-organizing neural networks, nonlinear filters, fuzzy and neuromorphic systems.

Winner-Take-All (WTA) is an analog computation cell that evaluates the highest input among a set of competing inputs and inhibits the others. The input may be in the form of current or voltage. However, in our proposed circuit, voltage is taken as an input, and so we call it voltage mode circuit. In neural networks, a proper choice of learning schemes is critical in the hardware implementation of neural-based information processing systems. There are two types of learning methods, the supervised and unsupervised learning. Supervised learning such as back propagation learning has been proven to be quite useful in many engineering applications. However, in the case when desired output is unknown in advance, the unsupervised learning method is most appropriate. Among the several unsupervised learning, self-organizing network using competitive learning is most suitable. So, the proposed circuit finds extensive use in neural network computation, such as Kohonen's maps, vector quantization, classification algorithm, etc., and various others in fuzzy logic. As software-based simulation hinges on the theory of neural networks, fuzzy logic can be performed in conventional Von Neumann machines, but they do not attain the desired speed for certain applications. So, in order to achieve fast and parallel computation, various electronic designs have been proposed in the literature (Lazzaro et al., 1989; Andreou et al., 1991; Choi and Sheu, 1993; Startzyk and Fang, 1993; DeWeerth and Morris, 1995; Serrano-Gotarredona and Linares-Barranco, 1998; Donckers et al., 1999; Indiveri, 2001; and Rahaman et al., 2009).

They are evaluated in terms of speed, resolution, power consumption and compactness. The analog implementation of the WTA circuit consumes less silicon area and power, and so, it is inherently faster compared to its digital counterparts. WTA circuits with transistors biased in the subthreshold region (Lazzaro et al., 1989; and Startzyk and Fang, 1993) of operation are quite efficient for low-power applications. However, these circuits have low speed, low swing and limited noise immunity. The current mode circuits (Lazzaro et al., 1989; Andreou et al., 1991; Startzyk and Fang, 1993; and DeWeerth and Morris, 1995) require special current to voltage conversion circuit, to interface with the digital processors. Circuits using switched capacitor are suitable only for discrete time systems. The circuits described in Rahaman et al. (2009) require two extra transistors to make the output voltage to provide rail-to-rail switch. The circuit described here is improved by eliminating two transistors M₁₀ and M₁₁ (as shown in Figure 1), and by changing the transistors W/L using all permutations and combinations to meet the requirements.

Telecommunications Journal, Analog CMOS Circuits, Voltage Mode, Winner-Take-All, WTA, Voltage Mode Circuit, Iinformation Processing System, Iinhibitory Feedback, Permutations and Combinations, Spectra Cadence Simulator, Fuzzy and Bio-Inspired Systems, Self-Organizing Neural Networks.